Part 6 - Reconfigurable Hardware

As we discussed in the first part of this series, there two main paradigms.

ASIC and reconfigurable Hardware

• ASIC
  • Advantages
    • Very high performance and efficient.
  • Disadvantages
    • Not flexible (can’t be altered after fabrication).
    • High cost.
• Reconfigurable computing
  • Advantages
    • Much higher performance than software, lower than ASIC.
    • Higher level of flexibility than ASIC, more difficult to program than software.
• Software-programmed processors
  • Advantages
    • Very flexible to change.
  • Disadvantages
    • Performance can suffer if the clock speed isn’t fast enough.
    • Fixed instruction set, set by the hardware.

Reconfigurable devices

Field-Programmable Gate Arrays, or FPGAs are on example on reconfigurable hardware.

An FPGA consists of an array of configurable logic blocks. These logic blocks are connected by a set of routing resources (usually wires) that also are programmable.

Arbitrary custom logic circuits/functions can be mapped onto these.

Reconfigurable gates

So, how do we configure these gates to what we want? The answer is look up tables or LUTs.

A lookup table is just memory cells that are connected into a K-mux, with an optional output flip-flop.

There is a hierarchy to these logic cells. In each logic cell (LC), there is a K-LUT. A logic cluster consists of N LCs. The LCs in each cluster is fully or nearly fully connected with each other.

LUT size

The size of our LUT and how we implement have their pros and cons:

• Bigger LUTs:
  • Fit more logic in each one of them
  • Fewer wires to interconnect
  • But slower to access each one of them
• Smaller LUTs
  • Fit less logic in each one
  • More wires to interconnect them
  • Faster to access one of them

Heterogeneous reconfigurable environments

Reconfigurable fabric can contain non-reconfigurable elements, these interface the logic blocks through the reconfigurable interconnect fabric.

Embedded memory, multipliers, adders, etc. are some examples.

Since it’s costly to implement memory with LUTs, hard chunks of RAM blocks are usually added.

Same, goes for multipliers, they are inherently slow if implemented with logic cells, therefore it’s better to add hard-wired multiplier blocks.

Reconfiguration memory

There are 3 types of these:

• Anti-fuse
  • by default is OFF; when programmed it is ON. (creating a short-circuit between the endpoints).
  • Advantages
    • Negligible delay
    • Small area overhead
    • No soft-errors and bit flips
  • Disadvantages
    • Not really reconfigurable; One time programmable.
• Flash
  • Advantages
    • Programming not lost when device is turned off.
    • Fewer transistors than SRAM.
    • Lower power than SRAM.
  • Disadvantages
    • Limited writes (~millions)
    • Slower writes than SRAM.
    • Higher voltage than circuits.
• SRAM
  • SRAM bit cell stores the programmability of the device
  • Advantages
    • Can be reconfigured quickly and as repeatedly as required.
    • No special fabrication steps.
  • Disadvantages
    • Takes more area and power.
    • Loses charge when turned off.

Summary

I think a good way of summarizing is reading these two quotes:

Reconfigurable Computing is Computing via post-fabrication, spatially programmed connection of processing elements. – Andre DeHon

The difference between reconfigurable and reprogrammable is that the first can implement an arbitrary number of functions directly in hardware, while the second supports only a predefined –during fabrication- finite number of functions. – Stamatis Vassiliadis